From the recently-posted details; ADP7185 is a CMOS, low dropout (LDO) linear regulator that operates from −2.0 V to −5.5 V and provides up to −500 mA of output current. This high output current LDO is suitable for regulation of high performance analogue and mixed signal circuits operating from −0.5 V down to −4.5 V. Total integrated output noise is 4 μV rms independent of the output voltage, for high performance and noise sensitive applications. Shutdown current consumption is −7 μA (maximum). ADP7185 provides high power supple rejection ratio (PSRR) and low noise, and it achieves excellent line and load transient response with a small 4.7 μF ceramic output capacitor.
The ADP7185 is available in 15 fixed output voltage options. The following voltages are available from stock: −0.5V, −1.0V, −1.2V, −1.5V, −1.8V, −2.0V, −2.5V, −3.0V, and −3.3V. Additional voltages available by special order are −0.8V, −0.9V, −1.3V, −2.8V, −4.2V, and −4.5V. An adjustable version is also available which allows output voltages that range from −0.5V to −VIN + 0.5V with an external feedback divider (diagram, above). The enable logic feature is capable of interfacing with positive or negative logic levels for maximum flexibility.
The ADP7185 regulator output noise is 4 μV rms independent of the output voltage. The ADP7185 is available in an 8-lead, 2 × 2 mm LFCSP, making it not only a very compact solution but also providing excellent thermal performance. An evaluation board is available (pictured). Appropriately noise sensitive applications are anticipated in communications, medical and healthcare, and in industrial and instrumentation.
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